Welcome to the High-Level Overview of Agnisys Tools
This course provides a comprehensive look at the Agnisys Design System (IDS) and its ecosystem of tools. You will gain a clear understanding of the complete workflow — from the formats and sources that serve as inputs, to the various design and verification outputs, and the automatically generated documentation that supports your work.
We will cover:
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All Inputs to IDS – supported formats including SystemRDL, IP-XACT, Word, Excel, IDS-NG, JSON, XML, and more.
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Outputs – the range of design, verification, and deliverable files generated by IDS such as RTL, Verilog, SystemVerilog, UVM, C, and C++.
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Documentation Outputs – auto-generated project documentation in HTML, PDF, and Markdown formats.
By the end of this session, you will have a high-level understanding of how different inputs are processed, how outputs are produced, and how to leverage IDS for faster and more accurate design and documentation.
